Metal-Gate Granularity-Induced Threshold Voltage Variability and Mismatch in Si Gate-All-Around Nanowire n-MOSFETs

Abstract

The metal-gate granularity-induced threshold voltage (V-T) variability and V-T mismatch in Si gate-all-around (GAA) nanowire n-MOSFETs (n-NWFETs) are studied using coupled 3-D statistical device simulations considering quantum corrected room temperature drift-diffusion transport. The impact of metal-gate crystal grain size on linear and saturation mode V-T variability are analyzed. The V-T mismatch study predicts lower mismatch figure of merit (A(VT)) in TiN-gated Si GAA n-NWFETs compared with the reported experimental mismatch data for TiN-gated Si FinFETs.