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dc.contributor.authorKUMAR, Aen_US
dc.contributor.authorKASHYAP, Ven_US
dc.contributor.authorSHERLEKAR, SDen_US
dc.contributor.authorVENKATESH, Gen_US
dc.contributor.authorBISWAS, Sen_US
dc.contributor.authorBHATT, PCPen_US
dc.contributor.authorKUMAR, Sen_US
dc.date.accessioned2011-07-31T14:11:18Zen_US
dc.date.accessioned2011-12-26T12:53:02Zen_US
dc.date.accessioned2011-12-27T05:40:08Z
dc.date.available2011-07-31T14:11:18Zen_US
dc.date.available2011-12-26T12:53:02Zen_US
dc.date.available2011-12-27T05:40:08Z
dc.date.issued1989en_US
dc.identifier.citationIEEE DESIGN & TEST OF COMPUTERS, 6(5), 50-57en_US
dc.identifier.issn0740-7475en_US
dc.identifier.urihttp://dx.doi.org/10.1109/54.43079en_US
dc.identifier.urihttp://dspace.library.iitb.ac.in/xmlui/handle/10054/8144en_US
dc.identifier.urihttp://hdl.handle.net/10054/8144
dc.language.isoenen_US
dc.publisherIEEE COMPUTER SOCen_US
dc.titleIDEAS - A TOOL FOR VLSI CADen_US
dc.typeArticleen_US


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