| Title: | Channel engineering for high speed sub-1.0 V power supply deep sub-micron CMOS |
| Author: | CHENG, BAOHONG; INANI, ANAND; RAMGOPAL RAO, V; WOO, JCS |
| Abstract: | The effects of channel engineering on device performance have been extensively investigated. The lateral asymmetric channel (LAC) MOSFETs show significantly higher Idsat and gmsat, lower I off, and superior short-channel performance compared with double-halo (DH) and conventional MOSFETs by effectively utilizing the velocity overshoot effects. It is demonstrated that the device switching speed of the LAC device at VDD=0.6 V is equivalent to that of a conventional device operated at VDD=1.5 V |
| URI: |
10.1109/VLSIT.1999.799344
http://hdl.handle.net/10054/574 http://dspace.library.iitb.ac.in/xmlui/handle/10054/574 |
| Date: | 1999 |
| Files | Size | Format | View |
|---|---|---|---|
| 799344.pdf | 166.7Kb |
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