Application of look-up table approach to high-K gate dielectric MOS transistor circuits

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Application of look-up table approach to high-K gate dielectric MOS transistor circuits

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Title: Application of look-up table approach to high-K gate dielectric MOS transistor circuits
Author: VINAY KUMAR, D; MOHAPATRA, NR; PATIL, MB; RAMGOPAL RAO, V
Abstract: In this paper, we study the circuit performance issues of high-K gate dielectric MOSFETs using the Look-up Table (LUT) approach. The LUT approach is implemented in a public-domain circuit simulator SEQUEL. We observed an excellent match between LUT simulator and mixed mode simulations using MEDICI. This work clearly demonstrates the predictive power of the new simulator, as it enables evaluation of circuits directly from device simulation results without going through model parameter extraction.
URI: 10.1109/ICVD.2003.1183126
http://hdl.handle.net/10054/427
http://dspace.library.iitb.ac.in/xmlui/handle/10054/427
Date: 2003


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