Optimization and realization of sub-100-nm channel length single halo p-MOSFETs

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Optimization and realization of sub-100-nm channel length single halo p-MOSFETs

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Title: Optimization and realization of sub-100-nm channel length single halo p-MOSFETs
Author: RAMGOPAL RAO, V; BORSE, DG; MANJULA RANI, KN; JHA, NEERAJ K; CHANDORKAR, AN; VASI, J; CHENG, B; WOO, JCS
Abstract: Single halo p-MOSFETs with channel lengths down to 100 nm are optimized, fabricated, and characterized as part of this study. We show extensive device characterization results to study the effect of large angle VT adjust implant parameters on device performance and hot carrier reliability. Results on both conventionally doped and single halo p-MOSFETs have been presented for comparison purposes.
URI: http://dx.doi.org/10.1109/TED.2002.1003752
http://hdl.handle.net/10054/148
http://dspace.library.iitb.ac.in/xmlui/handle/10054/148
Date: 2002


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