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Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/10054/9297

Title: Deep sub-micron device and analog circuit parameter sensitivity to process variations with halo doping and its effect on circuit linearity
Authors: NARASIMHULU, K
RAO, VR
Keywords: asymmetric channel profile
cmos technology
design
performance
mosfet
Issue Date: 2005
Publisher: JAPAN SOC APPLIED PHYSICS
Citation: JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS, 44(4B), 2180-2186
Abstract: Single halo (SH) and double halo (DH) metal oxide semiconductor field effect transistors (MOSFETs) have been reported to exhibit excellent short channel performance in the sub 100 nm regime. In this work, the effect of process variations such as gate oxide thickness, implantation parameters, channel length and temperature are systematically investigated on the device and analog circuit performance for all these technologies. Our simulation results on differential amplifiers and current mirrors show that, for an identical V(t) mismatch in conventional (CON), DH, and SH devices, SH MOSFETs show a lower variation in the circuit parameters. It is found that, for a specified circuit parameter variation, almost a 25% higher V(t) mismatch is tolerable with SH technologies as compared to the CON technologies. We also report in this work that, better saturation characteristics observed with SH devices improve the linearity of amplifiers when compared with the CON and DH devices, biased at identical voltage gains. However, one needs to account for the increased body bias induced non-linearity with SH technologies as demonstrated using circuit simulations for source follower and simple sample and hold circuits.
URI: http://dx.doi.org/10.1143/JJAP.44.2180
http://dspace.library.iitb.ac.in/xmlui/handle/10054/9297
http://hdl.handle.net/10054/9297
ISSN: 0021-4922
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