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|Title: ||Performance and Reliability of Au and Pt Single-Layer Metal Nanocrystal Flash Memory Under NAND (FN/FN) Operation|
|Authors: ||SINGH, PK|
|Keywords: ||design optimization|
|Issue Date: ||2009|
|Publisher: ||IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC|
|Citation: ||IEEE TRANSACTIONS ON ELECTRON DEVICES, 56(9), 2065-2072|
|Abstract: ||In this paper, we report on the fabrication and reliability characterization of gold (Au) and platinum (Pt) single-layer nanocrystal (NC)-based Flash memory devices for NAND application. The devices are fabricated using a CMOS-compatible process flow with high-quality (low leakage and large breakdown) Al(2)O(3) as the control dielectric. The impact of processing conditions on the NC size, area coverage, and number density is also investigated. Large memory window (similar to 7.5 V for Au and similar to 10 V for Pt) and good retention are observed for both Au and Pt NC devices. Excellent postcycling retention is also noted for Pt NC devices. Endurance characteristics are found to be of concern as maximum of only 1 x 10(3) and 4 x 10(3) cycles can be obtained for Au and Pt devices, respectively. Anneal-temperature-dependent gate leakage is observed in Au devices and is investigated using analytical methods. Diffusion of Au atoms from the NC into the gate dielectrics is seen which correlates to the electrical measurements. Postcycling retention and program/erase of Pt NC devices are shown to be good.|
|Appears in Collections:||Article|
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