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Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/10054/8206

Title: A Table-Based Approach to Study the Impact of Process Variations on FinFET Circuit Performance
Authors: THAKKER, RA
SATHE, C
BAGHINI, MS
PATIL, MB
Keywords: temperature
sensitivity
transistor
simulation
Issue Date: 2010
Publisher: IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
Citation: IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 29(4), 627-631
Abstract: This paper presents a novel table-based approach for efficient statistical analysis of Finfield effect transistor circuits. The proposed approach uses a new scheme for interpolation of look-up tables (LUTs) with respect to process parameters. The effect of various process parameters, viz., channel length, fin width, and effective oxide thickness is studied for three circuits: buffer chain, static random access memory cell, and high-gain low-voltage op-amp. Compared to mixed-mode (device-circuit) simulation, the proposed LUT-based approach is shown to be much faster, thus making it practically a feasible and attractive option for variability analysis especially for emerging technologies where compact models are not available for circuit simulation.
URI: http://dx.doi.org/10.1109/TCAD.2010.2042899
http://dspace.library.iitb.ac.in/xmlui/handle/10054/8206
http://hdl.handle.net/10054/8206
ISSN: 0278-0070
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