Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/xmlui/handle/10054/8119
Title: Window-based cell scheduling algorithm for VLSI implementation of an input-queued ATM switch
Authors: SANTHANAM, A
KARANDIKAR, A
Keywords: Packet Switch
Issue Date: 2000
Publisher: IEE-INST ELEC ENG
Citation: IEE PROCEEDINGS-COMMUNICATIONS, 147(2), 119-122
Abstract: A method for providing bandwidth reservations in an input-buffered self-routing crossbar switch architecture is introduced and analysed. The scheme computes a conflict-free set of flows within a cell slot and achieves a link utilisation as high as 93% for uniform random bursty traffic. Simulations of the proposed algorithm have been performed for different window sizes (W = 1, 2, 4, 8) and the cell loss probability (CLP), cell waiting time (CWT) and system throughput (ST) are estimated. The VLSI implementation of the scheme is also described.
URI: http://dx.doi.org/10.1049/ip-com:20000147
http://dspace.library.iitb.ac.in/xmlui/handle/10054/8119
http://hdl.handle.net/10054/8119
ISSN: 1350-2425
Appears in Collections:Article

Files in This Item:
There are no files associated with this item.


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.