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|Title:||Capacitance degradation due to fringing field in deep sub-micron MOSFETs with High-K gate dielectrics|
RAMGOPAL RAO, V
Semiconductor Device Models
|Citation:||Proceeding of the 29th European Solid-State Device Research Conference (V 1), Leuven, Belgium, 13-15 September 1999, 160-163|
|Abstract:||High-K gate dielectrics have been under extensive investigation for use in sub -100nm MOSFET's to suppress gate leakage.However,thicker gate dielectrics can result in degradation of the electrical performance due to increased fringing fields from the gate to source/drain. In this paper the capacitance degradation resulting from this effect is analyzed & simple technique to model this effect is presented.|
|Appears in Collections:||Proceedings papers|
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