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Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/10054/579

Title: Capacitance degradation due to fringing field in deep sub-micron MOSFETs with High-K gate dielectrics
Authors: INANI, A
RAMGOPAL RAO, V
CHENG, B
ZEITZOFF, P
WOO, JCS
Keywords: capacitance
mosfet
semiconductor device models
Issue Date: 1999
Publisher: IEEE
Citation: Proceeding of the 29th European Solid-State Device Research Conference (V 1), Leuven, Belgium, 13-15 September 1999, 160-163
Abstract: High-K gate dielectrics have been under extensive investigation for use in sub -100nm MOSFET's to suppress gate leakage.However,thicker gate dielectrics can result in degradation of the electrical performance due to increased fringing fields from the gate to source/drain. In this paper the capacitance degradation resulting from this effect is analyzed & simple technique to model this effect is presented.
URI: http://hdl.handle.net/10054/579
http://dspace.library.iitb.ac.in/xmlui/handle/10054/579
ISBN: 2-86332-245-1
Appears in Collections:Proceedings papers

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