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Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/10054/530

Title: The study of damage generation in n-channel MOS transistors operating in the substrate enhanced gate current regime
Authors: MOHAPATRA, NR
MAHAPATRA, S
RAMGOPAL RAO, V
Keywords: mosfet
electron traps
impact ionisation
semiconductor device measurement
semiconductor device reliability
Issue Date: 2002
Publisher: IEEE
Citation: Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, Singapore, 8-12 July 2002, 27-30
Abstract: This paper analyzes in detail the damage generation in n-channel MOS transistors operating in the substrate enhanced gate current (SEGC) regime. The results are also compared with the damage generated during conventional hot carrier stress experiments. Stressing and charge pumping experiments are carried out to study the degradation with different substrate bias. Our results clearly show that the application of a substrate bias enhances degradation, which is strongly dependent on the transverse electric field and spread of the interface trap profile. The possible mechanisms responsible for such trends are discussed.
URI: 10.1109/IPFA.2002.1025606
http://hdl.handle.net/10054/530
http://dspace.library.iitb.ac.in/xmlui/handle/10054/530
ISBN: 0-7803-7416-9
Appears in Collections:Proceedings papers

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