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Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/10054/399

Title: Parallelization of DC analysis through multiport decomposition
Authors: TRIVEDI, GAURAV
DESAI, MP
NARAYANAN, H
Keywords: conjugate gradient method
integrated circuits
networks (circuits)
computer programming languages
Issue Date: 2007
Publisher: IEEE
Citation: Proceedings of the 20th International Conference on VLSI Design held jointly with 6th International Conference on Embedded Systems, Bangalore, India, January 2007, 863-868.
Abstract: Physical problems offer scope for macro level parallelization of solution by their essential structure. For parallelization of electrical network simulation, the most natural structure based method is that of multiport decomposition. In this paper this method is used for the simulation of electrical networks consisting of resistances, voltage and current sources using a distributed cluster of weakly coupled processors. At the two levels in which equations are solved in this method the authors have used sparse LU for both levels in the first scheme and sparse LU in the inner level and conjugate gradient in the outer level in the second scheme. Results are presented for planar networks, for the cases where the numbers of slave processors are 1 and 2, and for circuit sizes up to 8.2 million nodes and 16.4 million edges using 8 slave processors. The authors use a cluster of Pentium IV processors linked through a 10/100MBPS Ethernet switch.
URI: 10.1109/VLSID.2007.125
http://hdl.handle.net/10054/399
http://dspace.library.iitb.ac.in/xmlui/handle/10054/399
ISBN: 0-7695-2762-0
Appears in Collections:Proceedings papers

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