Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/xmlui/handle/10054/398
Title: An on-chip coupling capacitance measurement technique
Authors: NAIR, PA
GUPTA, A
DESAI, MP
Keywords: Vlsi Circuits
Charge Coupled Device
Coupled Circuit
Spatial Variables Measurement
Issue Date: 2001
Publisher: IEEE
Citation: Proceedings of the Fourteenth International Conference on VLSI Design, Banglore, India, 3-7 January 2001, 495-499
Abstract: We describe a technique for the accurate measurement of on-chip coupling capacitance using a Charge Based Coupling Capacitance Measurement (CBCCM) Technique. Detailed circuit simulations show that this method can measure sub-femtofarad coupling capacitance values, and can be used to isolate and measure components of device capacitance as well.
URI: 10.1109/ICVD.2001.902707
http://hdl.handle.net/10054/398
http://dspace.library.iitb.ac.in/xmlui/handle/10054/398
ISBN: 0-7695-0831-6
Appears in Collections:Proceedings papers

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