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Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/10054/313

Title: Suppression of boron penetration by hot wire CVD polysilicon
Authors: VAIRAGAR, AV
PATIL, SAMADHAN B
PETE, DJ
WAGHMARE, PARAG C
DUSANE, RO
VENKATRAMANI, N
RAMGOPAL RAO, V
Keywords: cmos integrated circuit
cvd coating
boron
elemental semiconductors
integrated circuit technology
Issue Date: 2002
Publisher: IEEE
Citation: Proceedings of the 9th International Symposium on the Physical and Failure Analysis of Integrated Circuits, Singapore, 8-12 July 2002, 223-226
Abstract: In the current and future deep sub-micron technologies, boron penetration through the gate dielectric is a severe reliability concern for the dual gate CMOS technology. In this paper we report results of our attempts to exploit the potential of Hot Wire CVD (HWCVD) for depositing poly-Si gate for CMOS technology. The effect of grain size of poly-Si gate on boron penetration is studied by varying the poly-Si grain size through variation in the HWCVD parameters.
URI: 10.1109/IPFA.2002.1025667
http://hdl.handle.net/10054/313
http://dspace.library.iitb.ac.in/xmlui/handle/10054/313
ISBN: 0-7803-7416-9
Appears in Collections:Proceedings papers

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