Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/xmlui/handle/10054/301
Title: A comprehensive trapped charge profiling technique for SONOS flash EEPROMs
Authors: NAIR, PR
BHARATH KUMAR, P
SHARMA, RAVINDER
MAHAPATRA, S
KAMOHARA, S
Keywords: Monte Carlo Methods
Computer Simulation
Flash Memory
Threshold Voltage
Issue Date: 2004
Publisher: IEEE
Citation: Proceedings of the IEEE International Electron Devices Meeting Technical Digest, Tokyo, Japan, 13-15 December 2004, 403-406
Abstract: Trapped charge profiles under CHE program of SONOS flash cells are uniquely determined and verified using I-V, GIDL and CP measurements and Monte Carlo simulations. The prospect of profiling using I-V measurement alone is discussed. The inaccuracy associated with conventional CP technique is discussed. The correct method of CP simulation for programmed SONOS devices is shown and programming induced interface-trap generation is estimated.
URI: 10.1109/IEDM.2004.1419170
http://hdl.handle.net/10054/301
http://dspace.library.iitb.ac.in/xmlui/handle/10054/301
ISBN: 0-7803-8684-1
Appears in Collections:Proceedings papers

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