Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/xmlui/handle/10054/245
Title: A predictive reliability model for PMOS bias temperature degradation
Authors: MAHAPATRA, S
ALAM, MA
Keywords: Mosfet
Semiconductor Device Models
Semiconductor Device Reliability
Issue Date: 2002
Publisher: IEEE
Citation: Proceedings of the International Electron Devices Meeting, San Francisco CA, USA, 8-11 December 2002, 505-508
Abstract: Bias temperature degradation is studied in p-MOSFETs. The physical mechanisms responsible for degradation over a wide range of stress bias and temperature have been identified. A novel scaling methodology is proposed that helps in obtaining a simple, analytical model useful for reliability projection.
URI: 10.1109/IEDM.2002.1175890
http://hdl.handle.net/10054/245
http://dspace.library.iitb.ac.in/xmlui/handle/10054/245
ISBN: 0-7803-7462-2
Appears in Collections:Proceedings papers

Files in This Item:
File Description SizeFormat 
1175890.pdf214.79 kBAdobe PDFThumbnail
View/Open


Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.