DSpace
 

DSpace at IIT Bombay >
IITB Publications >
Article >

Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/10054/208

Title: Dual-bit/cell SONOS flash EEPROMs: impact of channel engineering on programming speed and bit coupling effect
Authors: DATTA, A
BHARATH KUMAR, P
MAHAPATRA, S
Keywords: cellular arrays
nonvolatile storage
optimization
semiconductor storage
Issue Date: 2007
Publisher: IEEE
Citation: IEEE Electron Device Letters 28(7), 446-48
Abstract: Programming performance of dual-bit silicon-oxide-nitride-oxide-silicon memories is studied on cells fabricated using different channel engineering schemes. Both halo and compensation implants are shown to impact the programming speed, bit coupling, and read disturb, and can be suitably adjusted to optimize the cell operation. The doping dependence of bit coupling and the programming speed are verified using well-calibrated 2-D device simulations.
URI: http://dx.doi.org/10.1109/LED.2007.895406
http://hdl.handle.net/10054/208
http://dspace.library.iitb.ac.in/xmlui/handle/10054/208
ISSN: 0741-3106
Appears in Collections:Article

Files in This Item:

File Description SizeFormat
Dual-bit cell SONOS flash EEPROMs.pdf105.32 kBAdobe PDFView/Open
View Statistics

Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.

 

Valid XHTML 1.0! DSpace Software Copyright © 2002-2010  Duraspace - Feedback