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| Title: | Analysis of floating body effects in thin film conventional and single pocket SOI MOSFETs using the GIDL current technique |
| Authors: | RAMGOPAL RAO, V NAJEEB-UD-DIN HAKIM DUNGA, MV AATISH KUMAR VASI, J CHENG, B WOO, JCS |
| Keywords: | mosfet semiconductor device models semiconductor process modelling silicon-on-insulator |
| Issue Date: | 2002 |
| Publisher: | IEEE |
| Citation: | Electron Device Letters 23(4), 209-11 |
| Abstract: | Using a novel gate-induced-drain-leakage (GIDL) current technique and two-dimensional (2-D) simulations, single pocket (SP) SOI MOSFETs have been shown to exhibit reduced floating body effects compared to the homogeneously-doped channel (conventional) SOI MOSFETs. The GIDL current technique has been used to characterize the parasitic bipolar transistor gain for both conventional and SP-SOI MOSFETs. From 2-D device simulations, the lower floating body effects in SP-SOI MOSFETs are analyzed and compared with the conventional MOSFETs. |
| URI: | http://dx.doi.org/10.1109/55.992841 http://hdl.handle.net/10054/190 http://dspace.library.iitb.ac.in/xmlui/handle/10054/190 |
| ISSN: | 0741-3106 |
| Appears in Collections: | Article
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