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Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/10054/1411

Title: Highly conducting doped poly-Si deposited by hot wire CVD and its applicability as gate material for CMOS devices
Authors: PATIL, SAMADHAN B
VAIRAGAR, ANAND V
KUMBHAR, ALKA A
SAHU, LAXMI
RAMGOPAL RAO, V
VENKATRAMANI, N
DUSANE, RO
SCHROEDER, B
Keywords: electrical conductivity
thin films
semiconductor doping
cmos integrated circuit
solar cells
Issue Date: 2003
Publisher: Elsevier
Citation: Thin Solid Films 430(1-2), 63-66
Abstract: Highly conducting p- and n-type poly-Si:H films were deposited by hot wire chemical vapor deposition (HWCVD) using SiH4+H2+B2H6 and SiH4+H2+PH3 gas mixtures, respectively. Conductivity of 1.2×102 (Ω cm)−1 for the p-type films and 2.25×102 (Ω cm)−1 for the n-type films was obtained. These are the highest values obtained so far by this technique. The increase in conductivity with substrate temperature (Ts) is attributed to the increase in grain size as reflected in the atomic force microscopy results. Interestingly conductivity of n-type films is higher than the p-type films deposited at the same Ts. To test the applicability of these films as gate contact Al/poly-Si/SiO2/Si capacitor structures with oxide thickness of 4 nm were fabricated on n-type c-Si wafers. Sputter etching of the poly-Si was optimized in order to fabricate the devices. The performance of the HWCVD poly-Si as gate material was monitored using C–V measurements on a MOS test device at different frequencies. The results reveal that as deposited poly-Si without annealing shows low series resistance.
URI: 0040-6090
http://hdl.handle.net/10054/1411
http://dspace.library.iitb.ac.in/xmlui/handle/10054/1411
ISSN: 10.1016/S0040-6090(03)00073-7
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