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Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/100/2899

Title: Fast DC analysis and its application to combinatorial optimization problems
Authors: TRIVEDI, G
DESAI, MP
NARAYANAN, H
Issue Date: 2005
Publisher: IEEE COMPUTER SOC
Citation: 19TH INTERNATIONAL CONFERENCE ON VLSI DESIGN, PROCEEDINGS,695-700
Abstract: Many combinatorial optimization problems such as the min cost flow problem are equivalent to the solution of appropriate DC circuits made up of positive resistors, voltage sources,. current sources and ideal diodes. Simulating the DC circuit is an alternative approach to the approximate solution of such problems. However, conventional simulators such as SPICE are too slow for this purpose. This paper describes the structure and performance of a fast DC Analyzer built at EE Department, IIT Bombay specifically for solving large circuits consisting of positive resistors, voltage sources, current sources and diodes. Using the simulator we have analyzed circuits composed of diodes, positive resistors, current and voltage sources of size upto 700,000 nodes and 1.2 million edges on a 3.0 GHz, I GB RAM, PIV processor in at most 1.2 Hrs. We also report a comparative study of the performance of our DC analyzer with that of fastest commercial simulator.
URI: http://dspace.library.iitb.ac.in/xmlui/handle/10054/16406
http://hdl.handle.net/100/2899
ISBN: 0-7695-2502-4
ISSN: 1063-9667
Appears in Collections:Proceedings papers

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