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Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/100/2419

Title: Benchmarking the device performance at SUB 22 NM node technologies using an SOC framework
Authors: SHRIVASTAVA, M
VERMA, B
BAGHINI, MS
RUSS, C
SHARMA, DK
GOSSNER, H
RAO, VR
Issue Date: 2009
Publisher: IEEE
Citation: 2009 IEEE INTERNATIONAL ELECTRON DEVICES MEETING,471-474
Abstract: For the first time this paper makes an attempt at predicting the System-on-Chip (SoC) performance (i.e. logic, SRAM, ESD and I/O) of various sub 20 nm channel length planar and non-planar SOI devices using extensive & well calibrated 3D device and mixed-mode TCAD simulations. It has been shown that the non-planar devices such as FinFETs are not the ideal choice for SoC applications and perform poorly in comparison to the Ultra thin body (UTB) planar SOT MOSFETs. We further show different strategies to optimize the planar UTB MOSFETs for improved ESD robustness and I/O performance.
URI: http://dspace.library.iitb.ac.in/xmlui/handle/10054/15761
http://hdl.handle.net/100/2419
ISBN: 978-1-4244-5639-0
Appears in Collections:Proceedings papers

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