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Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/100/2296

Title: Response surface methodology for statistical characterization of nano CMOS devices and circuits
Authors: MANDE, S
CHANDORKAR, AN
Issue Date: 2007
Publisher: IEEE
Citation: PROCEEDINGS OF THE 2007 INTERNATIONAL WORKSHOP ON THE PHYSICS OF SEMICONDUCTOR DEVICES: IWPSD-2007,297-300
Abstract: The accurate prediction of the impact of process variations on circuit performance is very crucial in deciding the parametric yield of integrated circuits. This paper presents the simulation methodology for studying the impact of process variations on device and circuit performance in nanometer regime. In this paper, an empirical model for power and delay of 45nm node CMOS inverter is build using the well-known Response Surface Methodology. This work also compares the suitability of different response design in terms of model accuracy.
URI: http://dspace.library.iitb.ac.in/xmlui/handle/10054/15901
http://hdl.handle.net/100/2296
ISBN: 978-1-4244-1727-8
Appears in Collections:Proceedings papers

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