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Please use this identifier to cite or link to this item: http://dspace.library.iitb.ac.in/jspui/handle/100/1845

Title: Effective dielectric thickness scaling for high-K gate dielectric MOSFETs
Authors: BHUWALKA, KK
MOHAPATRA, NR
NARENDRA, SG
RAO, VR
Issue Date: 2002
Publisher: MATERIALS RESEARCH SOCIETY
Citation: SILICON MATERIALS-PROCESSING, CHARACTERIZATION AND RELIABILITY,716,215-219
Abstract: It has been shown recently that the short channel performance worsens for high-K dielectric MOSFETs as the physical thickness to the channel length ratio increases, even when the effective oxide thickness (EOT) is kept identical to that of SiO2. In this work we have systematically evaluated the effective dielectric thickness for different K-gate to achieve targeted threshold voltage (V-t), drain-induced barrier lowering (DIBL) and I-on/I-off ratio for different technology generations down to 50 nm using 2-Dimensional process and device simulations. Our results clearly show that the oxide thickness scaling for high-K gate dielectrics and SiO2 follow different trends and the fringing field effects must be taken into account for estimation of effective dielectric thickness when SiO2 is replaced by a high-K dielectric.
URI: http://dspace.library.iitb.ac.in/xmlui/handle/10054/15096
http://hdl.handle.net/100/1845
ISBN: 1-55899-652-4
ISSN: 0272-9172
Appears in Collections:Proceedings papers

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