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DSpace at IIT Bombay >
Browsing by Author SHERLEKAR, SD
Showing results 1 to 5 of 5
| Issue Date | Title | Author(s) | | 1992 | A BEHAVIORAL FAULT SIMULATOR FOR IDEAL | KHOCHE, A; SHERLEKAR, SD; VENKATESH, G; VENKATESWARAN, R |
| 1995 | CONCURRENT ERROR-DETECTION USING MONITORING MACHINES | PAREKHJI, RA; VENKATESH, G; SHERLEKAR, SD |
| 1988 | CONDITIONALLY ROBUST 2-PATTERN TESTS AND CMOS DESIGN FOR TESTABILITY | SHERLEKAR, SD; SUBRAMANIAN, PS |
| 1989 | IDEAS - A TOOL FOR VLSI CAD | KUMAR, A; KASHYAP, V; SHERLEKAR, SD; VENKATESH, G; BISWAS, S; BHATT, PCP; KUMAR, S |
| 1996 | Monitoring machine based synthesis technique for concurrent error detection in finite state machines | PAREKHJI, RA; VENKATESH, G; SHERLEKAR, SD |
Showing results 1 to 5 of 5
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