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Browsing by Author SACHID, AB

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Showing results 1 to 8 of 8
Issue DateTitleAuthor(s)
2009Automated design and optimization of circuits in emerging technologiesTHAKKER, RA; SATHE, C; SACHID, AB; BAGHINI, MS; RAO, VR; PATIL, MB
2009Drain current model for nanoscale double-gate MOSFETsHARIHARAN, V; THAKKER, R; SINGH, K; SACHID, AB; PATIL, MB; VASI, J; RAO, VR
2008Gate fringe-induced barrier lowering in underlap FinFET structures and its optimizationSACHID, AB; MANOJ, CR; SHARMA, DK; RAO, VR
2009Highly robust nanoscale planar double-Gate MOSFET Device and SRAM cell immune to Gate-misalignment and process variationsSACHID, AB; KULKARNI, GS; BAGHINI, MS; SHARMA, DK; RAO, VR
2010Impact of Fringe Capacitance on the Performance of Nanoscale FinFETsMANOJ, CR; SACHID, AB; YUAN, F; CHANG, CY; RAO, VR
2008A Novel and robust approach for common mode feedback using IDDG FinFETSHRIVASTAVA, MAYANK; BAGHINI, MS; SACHID, AB; SHARMA, DK; RAMGOPAL RAO, V
2009A Novel Table-Based Approach for Design of FinFET CircuitsTHAKKER, RA; SATHE, C; SACHID, AB; BAGHINI, MS; RAO, VR; PATIL, MB
2008Sub-20 nm gate length FinFET design : can High-kappa spacers make a difference?SACHID, AB; FRANCIS, R; BAGHINI, MS; SHARMA, DK; BACH, KH; MAHNKOPF, R; RAO, VR
Showing results 1 to 8 of 8

 

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