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DSpace at IIT Bombay >
Browsing by Author RAO, SSSP
Showing results 1 to 20 of 20
| Issue Date | Title | Author(s) | | 1993 | Application of neural networks to the time-slot assignment in ss tdma systems with intersatellite links | BHANDARI, SM; POONACHA, PG; MURTHY, KVV; RAO, SSSP |
| 2004 | Development of an abstract model for a non-volatile static random access memory | THARAKAN, KTO; CHANDORKAR, AN; RAO, SSSP |
| 1998 | Formal specification and verification of hardware designs | RAMESH, S; RAO, SSSP; SIVAKUMAR, G; BHADURI, P |
| 1997 | FPGA implementation of median filter | MAHESHWARI, R; RAO, SSSP; POONACHA, PG |
| 2002 | Generation of high power test vector set for combinational VLSI circuits | THARAKAN, KTO; RAO, SSSP |
| 1987 | GKS IMPLEMENTATION - A CASE-STUDY | PARDIKAR, S; VAIDYA, M; RAO, SSSP |
| 1996 | Impact of delays in parallel I/O system : an empirical study | VENUGOPAL, CR; RAO, SSSP |
| 1989 | Interface optimization - an algorithm for the detection of data path redundancy and reconfigurability towards obtaining minimal bus interfaces | RAO, SSSP; ISAAC, JR |
| 1982 | MICROPROGRAMMABLE PERIPHERAL CONTROLLER | RAO, SSSP; PRADHAN, T |
| 1984 | MICRO-STORE OPTIMIZATION BASED ON MICRO-OPERATION UTILIZATION PROFILE | RAO, SSSP; RAMESH, V |
| 1985 | MICRO-STORE WIDTH OPTIMIZATION THROUGH BIT STEERING | RAO, SSSP; ISAAC, JR |
| 1987 | MODULAR APPROACH TO COLOR GRAPHICS SYSTEM-DESIGN - HARDWARE ASPECTS | NEMANI, RK; RAO, SSSP |
| 2005 | Multiple fault testing of logic resources of SRAM-based FPGAs | GOYAL, S; CHOUDHURY, M; RAO, SSSP; KUMAR, K |
| 1992 | An over-the-cell channel router | PAI, RR; RAO, SSSP |
| 2003 | Performance analysis of parallel file system for I/O load balancing in distributed applications | DEEPALAKSHMI, S; BASWARAJ, K; RAO, SSSP; JAGDISH, BS; SONAVANE, DD; DHEKNE, PS; KAURA, HK |
| 1982 | PERFORMANCE MONITORING OF THE EC 1030 SYSTEM BY A MICROPROCESSOR BASED MONITOR | RAO, SSSP; RADHAKRISHNAN, LS; SHUKLA, SV |
| 1992 | PLX - A PROPOSAL TO IMPLEMENT A GENERAL BROADCASTING FACILITY IN A DISTRIBUTED ENVIRONMENT RUNNING X WINDOWS | LASHKARI, YZ; RAO, SSSP; MHASKAR, VY; SHELAT, AC |
| 2005 | Power reduction technique using multi-vt libraries | SRIVASTAV, M; RAO, SSSP; BHATNAGAR, H |
| 1999 | Priority scheduling in parallel I/O systems | VENUGOPAL, CR; RAO, SSSP; PATKAR, S |
| 2003 | Programming process control in embedded systems | CHATURVEDI, N; RAO, SSSP; PATWARDHAN, SC |
Showing results 1 to 20 of 20
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