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DSpace at IIT Bombay >
Browsing by Author NARENDRA, SG
Showing results 1 to 6 of 6
| Issue Date | Title | Author(s) | | 2002 | Effective dielectric thickness scaling for high-K gate dielectric MOSFETs | BHUWALKA, KK; MOHAPATRA, NR; NARENDRA, SG; RAO, VR |
| 2002 | The effect of high-K gate dielectrics on deep submicrometer CMOS device and circuit performance | DESAI, MP; MOHAPATRA, NR; NARENDRA, SG; RAMGOPAL RAO, V |
| 2004 | The effect of LAC doping on deep submicrometer transistor capacitances and its influence on device RF performance | DESAI, MP; NARASIMHULU, K; NARENDRA, SG; RAMGOPAL RAO, V |
| 2002 | Effect of technology scaling on MOS transistor performance with high-K gate dielectrics | MOHAPATRA, NR; DESAI, MP; NARENDRA, SG; RAO, VR |
| 2003 | Modeling of parasitic capacitances in deep submicrometer conventional and high-K dielectric MOS transistors | MOHAPATRA, NR; DESAI, MP; NARENDRA, SG; RAO, VR |
| 2004 | To influence of process variations on the halo MOSFETs and its implications on the analog circuit performance | NARASIMHULU, K; NARENDRA, SG; RAO, VR |
Showing results 1 to 6 of 6
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