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DSpace at IIT Bombay >
Browsing by Author BAGHINI, MS
Showing results 1 to 20 of 34
| Issue Date | Title | Author(s) | | 2009 | 20GHz CMOS distributed voltage controlled oscillators with frequency tuning by MOS varactors | BHATTACHARYYA, K; MUKHERJEE, J; BAGHINI, MS |
| 2009 | 27.1GHz CMOS distributed voltage controlled oscillators with body bias for frequency tuning of 1.28GHz | BHATTACHARYYA, K; MUKHERJEE, J; BAGHINI, MS |
| 2010 | 6-bit low-power subranging-ADC with increased throughput | GOWDHAMAN, SK; BAGHINI, MS |
| 2009 | Automated design and optimization of circuits in emerging technologies | THAKKER, RA; SATHE, C; SACHID, AB; BAGHINI, MS; RAO, VR; PATIL, MB |
| 2009 | Benchmarking the device performance at SUB 22 NM node technologies using an SOC framework | SHRIVASTAVA, M; VERMA, B; BAGHINI, MS; RUSS, C; SHARMA, DK; GOSSNER, H; RAO, VR |
| 2010 | Comments on "An Analog 2-D DCT Processor" | NOOLU, SP; BAGHINI, MS |
| 2010 | Comments on "Improved Accuracy Pseudo-Exponential Function Generator With Applications in Analog Signal Processing" | KARANJKAR, NV; SAHOO, RR; BAGHINI, MS |
| 2009 | DC & transient circuit simulation methodologies for organic electronics | NAVAN, RR; THAKKER, RA; TIWARI, SP; BAGHINI, MS; PATIL, MB; MHAISALKAR, SG; RAO, VR |
| 2005 | Evaluation of the impact of layout on device and analog circuit performance with lateral asymmetric channel MOSFETs | PATIL, MB; VINAY KUMAR, D; NARASIMHULU, K; REDDY, PS; BAGHINI, MS; SHARMA, DK; RAMGOPAL RAO, V |
| 2009 | Filament study of sti type drain extended nmos device using transient interferometric mapping | SHRIVASTAVA, M; BYCHIKHIN, S; POGANY, D; SCHNEIDER, J; BAGHINI, MS; GOSSNER, H; GORNIK, E; RAO, VR |
| 2009 | A generic analytical model of switching characteristics for efficiency-oriented design and optimization of CMOS integrated buck converters | MODAK, R; BAGHINI, MS |
| 2009 | Highly resistive body STI Ndemos : an optimized demos device to achieve moving current filaments for robust ESD protection | SHRIVASTAVA, M; SCHNEIDER, J; BAGHINI, MS; GOSSNER, H; RAO, VR |
| 2009 | Highly robust nanoscale planar double-Gate MOSFET Device and SRAM cell immune to Gate-misalignment and process variations | SACHID, AB; KULKARNI, GS; BAGHINI, MS; SHARMA, DK; RAO, VR |
| 2002 | Impact of technology scaling on metastability performance of CMOS synchronizing latches | BAGHINI, MS; DESAI, MP |
| 2005 | A low-power and compact analog CMOS processing chip for portable ECG recorders | BAGHINI, MS; LAL, RAKESH; SHARMA, DK |
| 2009 | Low-power low-voltage analog circuit design using hierarchical particle swarm optimization | THAKKER, RA; BAGHINI, MS; PATIL, MB |
| 2007 | Microstrip equivalent parasitics modeling of RFIC interconnects | MUKHERJEE, JAYANTA; YOUNG-GI KIM; INWON SUH; ROBLIN, PATRICK; YAO-CHIAN LIN; WAN RONE LIOU; BAGHINI, MS |
| 2009 | A new physical insight and 3D device modeling of sti type denmos device failure under ESD conditions | SHRIVASTAVA, M; SCHNEIDER, J; BAGHINI, MS; GOSSNER, H; RAO, VR |
| 2008 | A Novel and robust approach for common mode feedback using IDDG FinFET | SHRIVASTAVA, MAYANK; BAGHINI, MS; SACHID, AB; SHARMA, DK; RAMGOPAL RAO, V |
| 2011 | A novel architecture for improving slew rate in FinFET-based op-amps and OTAs | THAKKER, RA; SRIVASTAVA, M; TAILOR, KH; BAGHINI, MS; SHARMA, DK; RAO, VR; PATIL, MB |
Showing results 1 to 20 of 34
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