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Browsing by Author VASI, J

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Issue DateTitleAuthor(s)
1993THE NATURE OF THE HOLE TRAPS IN REOXIDIZED NITRIDED-OXIDE GATE DIELECTRICSMALLIK, A; VASI, J; CHANDORKAR, AN
1993Net positive-charge buildup in various MOS insulators due to high-field stressingVASI, J; PATRIKAR, RM; LAL, RAKESH
1996Neutral electron trap generation under irradiation in reoxidized nitrided gate dielectricsRAO, VR; SHARMA, DK; VASI, J
1996Neutral electron trap generation under irradiation in reoxidized nitrided gate dielectricsRAMGOPAL RAO, V; SHARMA, DK; VASI, J
2003A new approach to model nonquasi-static (NQS) effects for MOSFETs. Part II: small-signal analysisROY, AS; VASI, J; PATIL, MB
2003A new approach to model nonquasi-static (NQS) effects for MOSFETs - Part I: large-signal analysisROY, AS; VASI, J; PATIL, MB
2003A new method to characterize border traps in submicron transistors using hysteresis in the drain currentRAMGOPAL RAO, V; MANJULA RANI, KN; VASI, J
1999A new "multifrequency" charge pumping technique to profile hot-carrier-induced interface-state density in nMOSFET'sMAHAPATRA, S; PARIKH, CD; VASI, J
1999A new “multifrequency” charge pumping technique to profile hot-carrier-induced interface-state density in nMOSFET'sMAHAPATRA, S; PARIKH, CD; VASI, J
1998A new technique to profile hot-carrier induced interface state generation in nMOSFETs using charge pumpingMAHAPATRA, S; PARIKH, CD; VASI, J
2008Nitride engineering and the effect of interfaces on charge trap flash performance and reliabilitySANDHYA, C; GANGULY, U; SINGH, KK; SINGH, PK; OLSEN, C; SEUTTER, SM; HUNG, R; CONTI, G; AHMED, K; KRISHNA, N; VASI, J; MAHAPATRA, S
2004A novel method to obtain 3-port network parameters from 2-port measurementsJHA, ANURANJAN; VASI, J; RUSTAGI, SC; PATIL, MB
1991A NUMERICAL-SIMULATION OF HOLE AND ELECTRON TRAPPING DUE TO RADIATION IN SILICON DIOXIDEVASUDEVAN, V; VASI, J
2013Optical Bandgap Tunability of Silicon Nanocrystals Fabricated by Inductively Coupled Plasma CVD for Next Generation PhotovoltaicsMAVILLA, NR; SOLANKI, CS; VASI, J
2000Optimization and realization of sub 100nm channel length lateral asymmetric channel P-MOSFETSHEMKAR, M; VASI, J; RAO, VR; CHENG, B; WOO, JCS
2002Optimization and realization of sub-100-nm channel length single halo p-MOSFETsRAMGOPAL RAO, V; BORSE, DG; MANJULA RANI, KN; JHA, NEERAJ K; CHANDORKAR, AN; VASI, J; CHENG, B; WOO, JCS
2001Performance and hot-carrier reliability of 100 nm channel length jet vapor deposited Si3N4 MNSFETsMAHAPATRA, S; RAMGOPAL RAO, V; CHENG, B; KHARE, M; PARIKH, CD; WOO, JCS; VASI, J
2001Performance optimization of 60 nm channel length vertical MOSFETs using channel engineeringSHRIVASTAV, G; MAHAPATRA, S; RAMGOPAL RAO, V; VASI, J
1993POWER LAW MODEL FOR POSITIVE CHARGE BUILDUP IN SILICON DIOXIDE DUE TO HIGH-FIELD STRESSINGPATRIKAR, RM; LAL, R; VASI, J
1991PROCESS DEPENDENCE OF BREAKDOWN FIELD IN THERMALLY NITRIDED SILICON DIOXIDERAMESH, K; CHANDORKAR, AN; VASI, J
Showing results 52 to 71 of 96
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