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Browsing by Author RAO, VR

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Showing results 7 to 26 of 119
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Issue DateTitleAuthor(s)
2009Benchmarking the device performance at SUB 22 NM node technologies using an SOC frameworkSHRIVASTAVA, M; VERMA, B; BAGHINI, MS; RUSS, C; SHARMA, DK; GOSSNER, H; RAO, VR
2009Bio-functionalization of silicon nitride-based piezo-resistive microcantileversKALE, NS; JOSHI, M; RAO, PN; MUKHERJI, S; RAO, VR
2009A CAD-compatible closed form approximation for the inversion charge areal density in double-gate MOSFETsHARIHARAN, V; VASI, J; RAO, VR
2002Channel engineering for sub-micron CMOS technologiesDIXIT, A; PAL, DK; ROY, JN; RAO, VR
2002Characterization and simulation of lateral asymmetric channel silicon-on-insulator MOSFETsNAJEEB-UD-DIN; RAO, VR; VASI, J
2009Characterization of interface and oxide traps in Ge pMOSFETs based on DCIV techniqueMAJI, D; CRUPI, F; MAGNONE, P; GIUSI, G; PACE, C; SIMOEN, E; RAO, VR
1997Charge trapping behaviour in deposited and grown thin metal-oxide-semiconductor gate dielectricsRAO, VR; HANSCH, W; BAUMGARTNER, H; EISELE, I; SHARMA, DK; VASI, J; GRABOLLA, T
2009Chemical vapor deposition precursors for high dielectric oxides: zirconium and hafnium oxideWALAWALKAR, MG; KOTTANTHARAYIL, A; RAO, VR
2003CHISEL programming operation of scaled NOR flash EEPROMs - Effect of voltage scaling, device scaling and technological parametersMOHAPATRA, NR; NAIR, DR; MAHAPATRA, S; RAO, VR; SHUKURI, S; BUDE, JD
2007Circuit performance improvement using PDSOI-DTMOS devices with a novel optimal sizing scheme considering body parasiticsANAND, B; RAO, VR; DESAI, MP
2008Closed form current and conductance model for symmetric double-gate MOSFETs using field-dependent mobility and body dopingHARIHARAN, V; THAKKER, R; PATIL, MB; VASI, J; RAO, VR
2002A comparative study of scaling properties of MOS transistors in CHE and CHISEL injection regimeMOHAPATRA, NR; MAHAPATRA, S; RAO, VR
2001Comparison of sub-bandgap impact ionization in sub-100 nm conventional and lateral asymmetrical channel nMOSFETsANIL, K; MAHAPATRA, S; RAO, VR; EISELE, I
2010Complementary Organic Circuits Using Evaporated F(16)CuPc and Inkjet Printing of PQTTAN, HS; WANG, BC; KAMATH, S; CHUA, J; SHOJAEI-BAGHINI, M; RAO, VR; MATHEWS, N; MHAISALKAR, SG
2009DC & transient circuit simulation methodologies for organic electronicsNAVAN, RR; THAKKER, RA; TIWARI, SP; BAGHINI, MS; PATIL, MB; MHAISALKAR, SG; RAO, VR
2005Deep sub-micron device and analog circuit parameter sensitivity to process variations with halo doping and its effect on circuit linearityNARASIMHULU, K; RAO, VR
2002Degradation study of ultra-thin JVD silicon nitride MNSFETsMANJULARANI, KN; RAO, VR; VASI, J
1981THE DEPTH OF MONOTONE BOOLEAN FUNCTIONS WITH MULTI INPUT AND AND OR GATESKEKRE, HB; SAHASRABUDHE, SC; RAO, VR
2006Design and fabrication issues in affinity cantilevers for bioMEMS applicationsKALE, NS; RAO, VR
2005Design of a 0.1 mu m single halo (SH) thin film silicon-on-insulator (SOI) MOSFET for analogue applicationsHAKIM, NUD; RAO, VR; VASI, J
Showing results 7 to 26 of 119
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