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DSpace at IIT Bombay >
Browsing by Author RAO, VR
Showing results 2 to 21 of 119
| Issue Date | Title | Author(s) | | 2007 | Affinity cantilever sensors for cardiac diagnostics | JOSHI, M; KALE, N; MUKHERJI, S; LAL, R; RAO, VR |
| 1998 | Alumina addition to fluoride slags for recycling of low oxygen high conductivity copper scrap through electroslag crucible melting | PRASAD, VVS; RAO, AS; PRAKASH, U; RAO, VR; RAO, PK; GUPT, KM |
| 2006 | Analog device and circuit performance degradation under substrate bias enhanced hot carrier stress | NARASIMHULU, K; RAO, VR |
| 2010 | Analysis of Threshold Voltage Variation in Fin Field Effect Transistors: Separation of Short Channel Effects | KOBAYASHI, Y; TSUTSUI, K; KAKUSHIMA, K; AHMET, P; RAO, VR; IWAI, H |
| 2009 | Automated design and optimization of circuits in emerging technologies | THAKKER, RA; SATHE, C; SACHID, AB; BAGHINI, MS; RAO, VR; PATIL, MB |
| 2009 | Benchmarking the device performance at SUB 22 NM node technologies using an SOC framework | SHRIVASTAVA, M; VERMA, B; BAGHINI, MS; RUSS, C; SHARMA, DK; GOSSNER, H; RAO, VR |
| 2009 | Bio-functionalization of silicon nitride-based piezo-resistive microcantilevers | KALE, NS; JOSHI, M; RAO, PN; MUKHERJI, S; RAO, VR |
| 2009 | A CAD-compatible closed form approximation for the inversion charge areal density in double-gate MOSFETs | HARIHARAN, V; VASI, J; RAO, VR |
| 2002 | Channel engineering for sub-micron CMOS technologies | DIXIT, A; PAL, DK; ROY, JN; RAO, VR |
| 2002 | Characterization and simulation of lateral asymmetric channel silicon-on-insulator MOSFETs | NAJEEB-UD-DIN; RAO, VR; VASI, J |
| 2009 | Characterization of interface and oxide traps in Ge pMOSFETs based on DCIV technique | MAJI, D; CRUPI, F; MAGNONE, P; GIUSI, G; PACE, C; SIMOEN, E; RAO, VR |
| 1997 | Charge trapping behaviour in deposited and grown thin metal-oxide-semiconductor gate dielectrics | RAO, VR; HANSCH, W; BAUMGARTNER, H; EISELE, I; SHARMA, DK; VASI, J; GRABOLLA, T |
| 2009 | Chemical vapor deposition precursors for high dielectric oxides: zirconium and hafnium oxide | WALAWALKAR, MG; KOTTANTHARAYIL, A; RAO, VR |
| 2003 | CHISEL programming operation of scaled NOR flash EEPROMs - Effect of voltage scaling, device scaling and technological parameters | MOHAPATRA, NR; NAIR, DR; MAHAPATRA, S; RAO, VR; SHUKURI, S; BUDE, JD |
| 2007 | Circuit performance improvement using PDSOI-DTMOS devices with a novel optimal sizing scheme considering body parasitics | ANAND, B; RAO, VR; DESAI, MP |
| 2008 | Closed form current and conductance model for symmetric double-gate MOSFETs using field-dependent mobility and body doping | HARIHARAN, V; THAKKER, R; PATIL, MB; VASI, J; RAO, VR |
| 2002 | A comparative study of scaling properties of MOS transistors in CHE and CHISEL injection regime | MOHAPATRA, NR; MAHAPATRA, S; RAO, VR |
| 2001 | Comparison of sub-bandgap impact ionization in sub-100 nm conventional and lateral asymmetrical channel nMOSFETs | ANIL, K; MAHAPATRA, S; RAO, VR; EISELE, I |
| 2010 | Complementary Organic Circuits Using Evaporated F(16)CuPc and Inkjet Printing of PQT | TAN, HS; WANG, BC; KAMATH, S; CHUA, J; SHOJAEI-BAGHINI, M; RAO, VR; MATHEWS, N; MHAISALKAR, SG |
| 2009 | DC & transient circuit simulation methodologies for organic electronics | NAVAN, RR; THAKKER, RA; TIWARI, SP; BAGHINI, MS; PATIL, MB; MHAISALKAR, SG; RAO, VR |
Showing results 2 to 21 of 119
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