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Browsing by Author NARAYANAN, H
Showing results 30 to 42 of 42
| Issue Date | Title | Author(s) | | 2007 | Parallelization of DC analysis through multiport decomposition | TRIVEDI, GAURAV; DESAI, MP; NARAYANAN, H |
| 2008 | Polyhedrally tight set functions and discrete convexity | FUJISHIGE, S; NARAYANAN, H |
| 1991 | THE PRINCIPAL LATTICE OF PARTITIONS OF A SUBMODULAR FUNCTION | NARAYANAN, H |
| 1992 | PRINCIPAL LATTICE OF PARTITIONS OF SUBMODULAR FUNCTIONS ON GRAPHS - FAST ALGORITHMS FOR PRINCIPAL PARTITION AND GENERIC RIGIDITY | PATKAR, S; NARAYANAN, H |
| 1992 | Principal lattice of partitions of submodular functions on graphs - fast algorithms for principal partition and generic rigidity | PATKAR, S; NARAYANAN, H |
| 1994 | RANDOMIZED PARALLEL ALGORITHMS FOR MATROID UNION AND INTERSECTION, WITH APPLICATIONS TO ARBORESENCES AND EDGE-DISJOINT SPANNING-TREES | NARAYANAN, H; SARAN, H; VAZIRANI, VV |
| 2003 | The realization of finite state machines by decomposition and the principal lattice of partitions of a submodular function | DESAI, MP; NARAYANAN, H; PATKAR, SB |
| 1995 | A ROUNDING TECHNIQUE FOR THE POLYMATROID MEMBERSHIP PROBLEM | NARAYANAN, H |
| 2002 | Some applications of an Implicit Duality Theorem to connections of structures of special types including Dirac and reciprocal structures | NARAYANAN, H |
| 2001 | Spectral algorithm to compute and synthesize reduced order passive models for arbitrary RC multiports | BATTERYWALA, SH; NARAYANAN, H |
| 1999 | A state assignment scheme targeting performance and area | GUPTA, BNVM; NARAYANAN, H; DESAI, MP |
| 1998 | Time domain method for reduced order network synthesis of large RC circuits | BATTERYWALA, SH; NARAYANAN, H |
| 1987 | TOPOLOGICAL TRANSFORMATIONS OF ELECTRICAL NETWORKS | NARAYANAN, H |
Showing results 30 to 42 of 42
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