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Browsing by Author NARAYANAN, H

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Issue DateTitleAuthor(s)
2007Application of DC analyzer to combinatorial optimization problemsTRIVEDI, GAURAV; PUNGLIA, SUMIT; NARAYANAN, H
2007Application of fast DC analysis to partitioning hypergraphsTRIVEDI, G; NARAYANAN, H
1993Application of the principal partition and principal lattice of partitions of a graph to the problem of decomposition of a finite state machineROY, SUBIR; NARAYANAN, H
1996Approximation algorithms for Min-k-overlap problems using the principal lattice of partitions approachNARAYANAN, H; ROY, S; PATKAR, S
1999Decomposition of finite state machines for area, delay minimizationSHELAR, RUPESH S; DESAI, MP; NARAYANAN, H
1999Efficient DC analysis of RVJ circuits for moment and derivative computations of interconnect networksBATTERYWALA, SH; NARAYANAN, H
2003An efficient practical heuristic for good ratio-cut partitioningPATKAR, SACHIN; NARAYANAN, H
2009Exploiting hybrid analysis in solving electrical networksSANKAR, VS; NARAYANAN, H; PATKAR, SB
1991A FAST ALGORITHM FOR THE PRINCIPAL PARTITION OF A GRAPHPATKAR, S; NARAYANAN, H
2006Fast DC analysis and its application to combinatorial optimization problemsTRIVEDI, GAURAV; DESAI, MP; NARAYANAN, H
2005Fast DC analysis and its application to combinatorial optimization problemsTRIVEDI, G; DESAI, MP; NARAYANAN, H
1992Fast loop matrix generation for hybrid analysis and a comparison of the sparsity of the loop impedance and MNA impedance submatricesOVALEKAR, VRINDA S; NARAYANAN, H
2000Fast on-line/off-line algorithms for optimal reinforcement of a network and its connections with principal partitionPATKAR, SB; NARAYANAN, H
2003Fast on-line/off-line algorithms for optimal reinforcement of a network and its connections with principal partitionPATKAR, SB; NARAYANAN, H
1992Fast sequential and randomized parallel algorithms for rigidity and approximate min k-cutPATKAR, S; NARAYANAN, H
2010FPGA based high performance double-precision matrix multiplicationKUMAR, VBY; JOSHI, S; PATKAR, SB; NARAYANAN, H
2009FPGA based high performance double-precision matrix multiplicationKUMAR, VBY; JOSHI, S; PATKAR, SB; NARAYANAN, H
2003Improving graph partitions using submodular functionsPATKAR, SB; NARAYANAN, H
2002Mathematical methods in VLSIATRE, MV; SUBRAMANIAN, S; NARAYANAN, H
2004Mathematical programming and resistor transformer diode networksNARAYANAN, H
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