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DSpace at IIT Bombay >
Browsing by Author NAIR, DR
Showing results 1 to 13 of 13
| Issue Date | Title | Author(s) | | 2003 | CHISEL programming operation of scaled NOR flash EEPROMs - Effect of voltage scaling, device scaling and technological parameters | MOHAPATRA, NR; NAIR, DR; MAHAPATRA, S; RAO, VR; SHUKURI, S; BUDE, JD |
| 2003 | CHISEL programming operation of scaled NOR flash EEPROMs-effect of voltage scaling, device scaling and technological parameters | MAHAPATRA, S; MOHAPATRA, NR; NAIR, DR; RAMGOPAL RAO, V; SHUKURI, S; BUDE, JD |
| 2004 | Cycling endurance of NOR flash EEPROM cells under CHISEL programming operation - impact of technological parameters and scaling | NAIR, DR; SHUKURI, S; MAHAPATRA, S |
| 2004 | Drain disturb during CHISEL programming of NOR flash EEPROMs-physical mechanisms and impact of technological parameters | MAHAPATRA, S; NAIR, DR; SHUKURI, S; BUDE, JD |
| 2003 | The effect of CHE and CHISEL programming operation on drain disturb in flash EEPROMs | NAIR, DR; MOHAPATRA, NR; MAHAPATRA, S; SHUKURI, S; BUDE, JD |
| 2004 | Effect of P/E cycling on drain disturb in flash EEPROMs under CHE and CHISEL operation | MAHAPATRA, S; NAIR, DR; MOHAPATRA, NR; SHUKURI, S; BUDE, JD |
| 2005 | Explanation of P/E cycling impact on drain disturb in flash EEPROMs under CHE and CHISEL programming operation | MAHAPATRA, S; NAIR, DR; SHUKURI, S; BUDE, JD |
| 2005 | Explanation of P/E cycling impact on drain disturb in flash EEPROMs under CHE and CHISEL programming operation | NAIR, DR; MAHAPATRA, S; SHUKURI, S; BUDE, JD |
| 2003 | The impact of channel engineering on the performance reliability and scaling of CHISEL NOR flash EEPROMs | MOHAPATRA, NR; NAIR, DR; MAHAPATRA, S; RAMGOPAL RAO, V; SHUKURI, S |
| 2005 | Mechanism of drain disturb in SONOS flash EEPROMs | BHARATH KUMAR, P; SHARMA, RAVINDER; NAIR, PR; NAIR, DR; KAMOHARA, S; MAHAPATRA, S; VASI, J |
| 2004 | Multi-level programming of NOR flash EEPROMs by CHISEL mechanism | NAIR, DR; MAHAPATRA, S; SHUKURI, S; BUDE, JD |
| 2005 | Soft secondary electron programming for floating gate NOR flash EEPROMs | BHARATH KUMAR, P; NAIR, DR; MAHAPATRA, S |
| 2006 | Using soft secondary electron programming to reduce drain disturb in floating-gate nor flash EEPROMs | MAHAPATRA, S; BHARATH KUMAR, P; NAIR, DR |
Showing results 1 to 13 of 13
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