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Browsing by Author MAHAPATRA, S

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Issue DateTitleAuthor(s)
2008Nitride engineering and the effect of interfaces on charge trap flash performance and reliabilitySANDHYA, C; GANGULY, U; SINGH, KK; SINGH, PK; OLSEN, C; SEUTTER, SM; HUNG, R; CONTI, G; AHMED, K; KRISHNA, N; VASI, J; MAHAPATRA, S
1988A novel electroless process of deposition of thin ni-p coatings on poly(methyl) methacrylateBHATGADDE, LG; MAHAPATRA, S
1983A NOVEL ELECTROLESS TECHNIQUE FOR COPPER METALLIZATION OF ALUMINA SUBSTRATESBHATGADDE, LG; MAHAPATRA, S
2009A Novel Gate-Assisted Reverse-Read Scheme to Control Bit Coupling and Read Disturb for Multibit/Cell Operation in Deeply Scaled Split-Gate SONOS Flash EEPROM CellsDATTA, A; ASNANI, R; MAHAPATRA, S
1990A novel method of metallization for MMICsMAHAPATRA, S; CHOUDHURY, D
1985ON THE DESIGN OF HIGH-POWER MULTIPLE-ELEMENT LOADED-LINE PHASE SHIFTERSNAYAGAM, S; MAHAPATRA, S
2005On the dispersive versus arrhenius temperature activation of nbti time evolution in plasma nitrided gate oxides: measurements, theory, and implicationsVARGHESE, D; SAHA, D; MAHAPATRA, S; AHMED, K; NOURI, F; ALAM, M
2006On the generation and recovery of hot carrier induced interface traps: a critical examination of the 2-D R-D modelMAHAPATRA, S; SAHA, D; VARGHESE, D
2006On the generation and recovery of interface traps in MOSFETs subjected to NBTI, FN, and HCI stressMAHAPATRA, S; SAHA, D; VARGHESE, D; BHARATH KUMAR, P
2010On the Nature of Shunt Leakage in Amorphous Silicon p-i-n Solar CellsDONGAONKAR, S; KARTHIK, Y; WANG, DP; FREI, M; MAHAPATRA, S; ALAM, MA
2007On the physical mechanism of NBTI in silicon oxynitride p-MOSFETs: can differences in insulator processing conditions resolve the interface trap generation versus hole trapping controversy?MAHAPATRA, S; AHMED, K; VARGHESE, D; ISLAM, AE; GUPTA, G; MADHAV, L; SAHA, D; ALAM, MA
2008Optimization of gate leakage and NBTI for plasma-nitrided gate oxides by numerical and analytical modelsISLAM, AE; GUPTA, G; AHMED, KZ; MAHAPATRA, S; ALAM, MA
2001Performance and hot-carrier reliability of 100 nm channel length jet vapor deposited Si3N4 MNSFETsMAHAPATRA, S; RAMGOPAL RAO, V; CHENG, B; KHARE, M; PARIKH, CD; WOO, JCS; VASI, J
2009Performance and Reliability of Au and Pt Single-Layer Metal Nanocrystal Flash Memory Under NAND (FN/FN) OperationSINGH, PK; HOFMANN, R; SINGH, KK; KRISHNA, N; MAHAPATRA, S
2002Performance and reliability of high density flash EEPROMs under CHISEL programming operationMAHAPATRA, S; SHUKURI, S; BUDE, JD
2010Performance and Reliability Study of Single-Layer and Dual-Layer Platinum Nanocrystal Flash Memory Devices Under NAND OperationSINGH, PK; BISHT, G; AULUCK, K; SIVATHEJA, M; HOFMANN, R; SINGH, KK; MAHAPATRA, S
1990PERFORMANCE EVALUATION OF 2 PASSIVE MMIC COMPONENTSCHOUDHURY, D; MAHAPATRA, S
2001Performance optimization of 60 nm channel length vertical MOSFETs using channel engineeringSHRIVASTAV, G; MAHAPATRA, S; RAMGOPAL RAO, V; VASI, J
2013A Physical and SPICE Mobility Degradation Analysis for NBTICHAUDHARY, A; MAHAPATRA, S
2007Physical mechanism and gate insulator material dependence of generation and recovery of negative-bias temperature instability in p-MOSFETsVARGHESE, D; GUPTA, G; LAKKIMSETTI, LM; SAHA, D; AHMED, K; NOURI, F; MAHAPATRA, S
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