DSpace
 

DSpace at IIT Bombay >

Browsing by Author CHU, D

Jump to: 0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
or enter first few letters:   
Sort by: In order: Results/Page Authors/Record:
Showing results 2 to 2 of 2
< previous 
Issue DateTitleAuthor(s)
2013Scaled Gate Stacks for Sub-20-nm CMOS Logic Applications Through Integration of Thermal IL and ALD HfOxJOSHI, K; HUNG, S; MUKHOPADHYAY, S; SATO, T; BEVAN, M; RAJAMOHANAN, B; WEI, A; NOORI, A; MCDOUGALL, B; NI, C; LAZIK, C; SAHELI, G; LIU, P; CHU, D; DATE, L; DATTA, S; BRAND, A; SWENBERG, J; MAHAPATRA, S
Showing results 2 to 2 of 2
< previous 

 

Valid XHTML 1.0! DSpace Software Copyright © 2002-2010  Duraspace - Feedback